Changeset 216
- Timestamp:
- 12/03/08 00:20:02 (16 years ago)
- Files:
-
- 1 modified
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pmsm/simulator_zdenek/simulator.cpp
r135 r216 113 113 // === init of particular modules of simulator === 114 114 // PWM init 115 smer=-1; smer2=-1; 116 citac=0; 117 citac2=abs(0-(int)(DT/h)); //VS: oprava, je to spravne? 115 smer=1; smer2=1; 118 116 citac_PR=h_reg_counter_mez; 119 117 citac=citac_PR; 118 citac2=abs(citac_PR-(int)(DT/h)); //VS: oprava, je to spravne? 119 120 120 // first interrupt occur after first period match => add 1 to both counter registers 121 citac++;smer=1;122 citac2--;121 // citac++;smer=1; 122 // citac2--; 123 123 124 124 modulace=1; // THIPWM … … 173 173 174 174 for (i=0;i<3;i++) 175 { dtr[i]=ubytek(fabs(iabc[i]) )*0.;175 { dtr[i]=ubytek(fabs(iabc[i])*0.); //VS 176 176 dd[i]=dtr[i]*.73; 177 177 }