28 | | void MemDS::linkrvs(RV &drv, RV &urv) { |
29 | | it_assert_debug(drv.count()==rowid.length(),"MemDS::linkrvs incompatible drv"); |
30 | | it_assert_debug(urv.count()==0,"MemDS does not support urv."); |
31 | | |
| 28 | void MemDS::linkrvs ( RV &drv, RV &urv ) { |
| 29 | it_assert_debug ( drv.count() ==rowid.length(),"MemDS::linkrvs incompatible drv" ); |
| 30 | it_assert_debug ( urv.count() ==0,"MemDS does not support urv." ); |
| 31 | |
36 | | MemDS::MemDS(mat &Dat, ivec &rowid, ivec &delays){ |
37 | | it_assert_debug(max(rowid)<=Dat.rows(),"MemDS rowid is too high for given Dat."); |
38 | | it_assert_debug(max(delays)<Dat.cols(),"MemDS delays are too high."); |
39 | | |
40 | | time = max(delays); |
| 36 | MemDS::MemDS ( mat &Dat, ivec &rowid, ivec &delays ) { |
| 37 | it_assert_debug ( max ( rowid ) <=Dat.rows(),"MemDS rowid is too high for given Dat." ); |
| 38 | it_assert_debug ( max ( delays ) <Dat.cols(),"MemDS delays are too high." ); |
| 39 | |
| 40 | time = max ( delays ); |
| 43 | |
| 44 | void ArxDS::step() { |
| 45 | double tmp; |
| 46 | //get regressor |
| 47 | rgr = rgrlnk.get_val ( H ); |
| 48 | // Eval Y |
| 49 | Y = model.samplecond ( rgr,tmp ); |
| 50 | |
| 51 | //shift history |
| 52 | H.shift_right ( 0, Drv.count() +Urv.count() ); |
| 53 | //fill new data |
| 54 | H.set_subvector ( Drv.count(),Y ); |
| 55 | |
| 56 | //Leaving U.length() empty slots - these will be filled by write() |
| 57 | } |
| 58 | |
| 59 | //! Auxiliary function building full history of rv0 |
| 60 | RV fullrgr ( const RV &drv0, const RV &urv0, const RV &rrv0 ) { |
| 61 | RV T ( urv0 ); |
| 62 | RV pom = concat(drv0, urv0); |
| 63 | int mint = rrv0.mint(); |
| 64 | for ( int i=0; i>mint; i-- ) { |
| 65 | pom.t ( -1 ); |
| 66 | T.add ( pom ); |
| 67 | } |
| 68 | return T; |
| 69 | } |
| 70 | |
| 71 | ArxDS::ArxDS ( RV &drv, RV &urv, RV &rrv ) : |
| 72 | DS(drv,urv), Rrv(rrv), Hrv( fullrgr ( drv,urv,rrv )), //RVs |
| 73 | Y(drv.count()), H(Hrv.count()) ,rgr ( rrv.count() ), //tmp variables |
| 74 | rgrlnk (Hrv ,rrv ) ,model ( drv,rrv ) { |
| 75 | } |